The invention is generally related to digital signal processor (DSP) circuit arrangements and integrated circuits incorporating the same and, in particular, to a DSP configured for sample processing for a plurality of recording and play back devices.
As semiconductor fabrication technology advances, designers of integrated circuits are able to integrate more and more functions into a single integrated circuit device, or chip. As such, electronic designs that once required several integrated circuits electrically coupled to one another on a circuit board or module may now be integrated into a single integrated circuit, thereby increasing performance and reducing cost.
One function that has migrated from discrete circuits to integrated circuits is digital signal processing, which is generally the application of mathematical operations to digitally represented signals. Digital signal processing is utilized in a number of applications, such as to implement filters for audio and/or video signals, to decode information from communication signals such as in wireless or other cellular networks, etc.
Semiconductor fabrication technology has advanced to the point where the logic circuitry that carries out digital signal processing may be carried out by dedicated digital signal processors that execute software programs, referred to herein as DSP programs, to implement specialized DSP algorithms. Moreover, digital signal processors may be embedded in integrated circuits, or chips, with additional logic circuitry to further provide improvements in performance while lowering costs.
The ability to program a DSP provides great flexibility. For example, a DSP may form the processing engine for an audio controller used in a home theater system, console video gaming system, or a music entertainment system. The audio controller generally performs a number of functions for a host controller. For example, the audio controller interfaces with a number of external input and output (I/O) devices that provide or receive digital audio samples. The DSP may further perform sound processing of the samples, providing effects such as music synthesis, rendering three dimensional positioning of sound, conversion between sound formats, and other functions.
Typically, the DSP interconnects with various types of external I/O devices via a DSP bus to which the various I/O devices are interfaced. These I/O devices provide samples or request samples by xe2x80x9cinterruptingxe2x80x9d the DSP, wherein an interrupt is a hardware or software signal that temporarily stops program execution in a computer so that another procedure can be carried out. In particular, another portion of DSP instructions may be performed that handle interrupts. Thus, upon receiving an interrupt, the DSP typically has to save its current state and execute interrupt program code to perform the sample transfer before being able to return to its previous operation. The overhead associated with handling an interrupt with a DSP can be substantial, e.g., 30 to 50 clock cycles or more, so any time a DSP is diverted to handling interrupts, the DSP""s ability to perform its primary signal processing tasks is diminished.
In audio controller applications, a DSP has traditionally had to handle an interrupt every time that an external I/O devices needs two 16-bit words (stereo audio pair) of data between data memory and audio I/O registers. External audio I/O devices typically operate at sample rates from 8 to 48 kHz. Conventional DSP designs that are configured to handle three input and three output external I/O devices have been found to require approximately 288,000 interrupts per second. Handling this number of interrupts with a DSP typically requires 9-14 million instructions per second (MIPS), which is a significant portion of the available processing time for a DSP.
In some applications, audio controllers increase the operating speed of the DSP several-fold in order to handle the interrupts while providing high performance sound processing and multi-function capability. However, the higher operating speed increases the cost and complexity of the DSP. In other applications, additional I/O register buffers are used to interface the audio controller to the external I/O devices. However, the registers also increase the cost and number of external connections for the audio controller.
Therefore, a significant need continues to exist in the art for a manner in a digital signal processing environment of decreasing the overhead processing of handling DSP interrupts from external I/O devices.
The invention addresses these and other problems associated with the prior art by providing a circuit arrangement that uses an interrupt accelerator to reduce the number of interrupts to a DSP. The interrupt accelerator principally handles transfers between a data memory and an I/O interface without having to interrupt the DSP for each transfer, as in conventional designs. As a result, the DSP needs to be interrupted only after blocks of data have been transferred. By reducing the number of interrupts to the DSP with an interrupt accelerator, the DSP has reduced overhead and thus more available bandwidth for performing other DSP operations.
Consistent with one aspect of the invention, an interrupt accelerator responds to an I/O interrupt from an I/O interface by transferring samples with the data memory. When a predetermined number, or block, of samples has been transferred, the interrupt accelerator interrupts the DSP so that the DSP will handle the block of samples.
These and other advantages and features which characterize the invention are set forth in the claims annexed hereto and forming a further part hereof. However, for a better understanding of the invention, and of the advantages and objectives attained through its use, reference should be made to the Drawings, and to the accompanying descriptive matter, in which there is described exemplary embodiments of the invention.